Automatic transversal equalizer

ABSTRACT

An equalizing circuit, intended to be inserted between the transmission link and the receiver of an electrical information transmission system, the equalizer being arranged to have, within a preselected bandwidth of audio frequencies, an amplitude frequency response in the form of a family of similar curves, the equalizer including comparison means which is responsive to the difference between the outputs of the equalizer at two different frequencies of which at least one is within the said bandwidth to thereby automatically select a predetermined one of the said curves.

United States Patent Starr et al. 1 June 13, 1972 [54] AUTOMATICTRANSVERSAL 3,017,508 1/1962 Kious ..333/18 X EQUALIZER 3,292,! 1612/1966 Walker et a1. ..333/1 8 3,292,110 12/1966 Becker et al ..333/18[72) inventors: Arthur T. Starr, New Barnet; David G.

Edwards, Tonbridge Wells, both of England [73] Assignee: XeroxCorporation, Stamford, Conn.

[22] Filed: Nov. 6, 1970 [21] Appl. No.: 87,546

[30] Foreign Application Priority Data April 21, 1970 Great Britain..l9,039/70 [52] US. Cl. 325/65, 333/28 R 51] Int. Cl. ..H04b 3/04 [58]Field oiSearch ..333/18, 28, 70T, 16; 179/1 P;

[56] References Cited UNITED STATES PATENTS 3,011,135 11/1961 Stumpetal...333/18X l2 I7 40 15 I3 IOOr IOOr l/P T T T Primary Examiner-Paul L.Gensler Attorney-James J. Ralabate, John E. Beck and Franklyn C.

Weiss ABSTRACT 10 China, 13 Drawing Figures RT IK O.V, in 241" 1 47K itLZkHz r57 2 4kHz ee was, I} FILTER FILTER H i i I: RECTIFY RECTIFY 1 AND59 AND -70 SMOOTH SMOOTH a e I! A H W 7/ 73 (A-Bl P'A'TE'N'TEDJuu 13I872 SHEET 1 BF 6 I o------ RECEIVER TRANSM'TTER A. F. TRANSMISSION LINKI 3 ,4 2 TRANSMITTE -'--o EQUAL'Z'NG RECEIVER em) WI Oho) 24 25 27 /9 l5l6 l7 2Z6 l8 l6 I8 so A l 4.0 f3! 1 24 4R 25 26 R 27 3 28 4R? 1 3 /9 40l T r RTI l r T) i I I l2 /3 /4 1 r I i r- $46 44 4 summme AMPLIFIER F)"x i l I 45 mvmoxs ARTHUR. T. STARR FIG" 6 BY DAVID e. EDWARDS ATTORNEYMfg/w PATENIEDJua 1 3 m2 SHEET S (If 6 W lOOr 63' T y T PATENTEUJUN 13m2 SHEET 8 OF 6 no 2 mmZOmmwm wank-Jazz FREQUENCY IN KHz nn 2- mmZOmmmmmQDbJmsE FREQUENCY IN KHZ FIG. I2

FREQUENCY IN KHz AUTOMATIC TRANSVERSAL EQUALIZER This invention isconcerned with improvements in or relating to electrical informationtransmission systems of the type (hereinafter referred to forconvenience as the type specified") wherein the system includes atransmitter of audiofrequency signals and a receiver of those signals,the system being of the kind wherein the signals are conveyed from thetransmitter to the receiver by establishing an interconnectiontherebetween by means of a given one, or one at a time, of typicallyavailable audio-frequency transmission links.

One example of such a case is where the transmitter and the receiver ofthe data-transmission system of our co-pending U.S. Pat. application,Ser. No. 87,545 filed on Nov. 6, 1970 are intermittently interconnected,for the transmission of the data, by way of a commercial telephone ortelegraph transmission link which is established, as and when required,between the locations of the transmitter and of the receiver.

According to one aspect of the invention there is provided an equalizingcircuit, intended to be inserted between the transmission link and thereceiver of an electrical information transmission system of the typespecified, the equalizer being arranged to have, within a preselectedbandwidth of the said audio-frequencies, an amplitude-frequency responsein the form of a family of similar curves, the equalizer includingcomparison means which is responsive to the difl'erence between theoutputs of the equalizer at two different frequencies of which at leastone is within the said bandwidth to thereby automatically select apredetermined one of the said curves.

Conveniently, the circuit includes a transversal network of the kindcomprising at least two time-delay network circuits each having an inputand an output and connected together in series so as to form a chainhaving an input, which constitutes the network input, and an output anda number of intermediate junctions each formed where the output of onesaid circuit is connected to the input of the next succeeding circuit inthe chain, the network also including a separate corresponding pick-oflresistance associated with and connected to each of the said chaininput, the said chain output and the said intermediate junctions so asto provide, in response to an input signal appearing at the networkinput, a number of pickoff signals equal in number to the number of theresistances, and the network also including first combining means forcombining the pick-off signals in predetermined relationship to producea first network output signal, the network also including at least onefurther pick-ofi' resistance associated with and connected to one of thesaid intermediate junctions so as to provide, in response to the saidinput signal appearing at the network input, a further pick-ofi' signalconstituting a second network output signal, the network also includingsecond combining means for combining the first and the second networkoutput signals in variable relationship to thereby provide the saidfamily of curves.

Conveniently, there is an even number of the time-delay circuitsarranged in pairs, the circuits of each pair having equal time-delaysand being symmetrically located at opposite sides of that one saidintermediate junction which is at the center of the chain, thefirst-mentioned pick-E resistances being so selected that thecorresponding pick-off signals comprise a single pick-off signal fromthe said central one intermediate junction and a number of pairs ofpick-off signals for each of which pairs the two signals are similarexcept in that one is time-delayed relatively to the other.

Conveniently, there is one said further pick-off resistance, whichresistance is associated with and connected to the said one intermediatejunction which is at the center of the chain.

There may be four of the time-delay circuits.

Conveniently, the time-delay circuits have each the same time-delay.

The first combining means may comprise, at least in part, the connectionof at least two of the first-mentioned pick-ofi signals to a commonpoint, and/or may comprise, at least in part, an inverting amplifier forreversing the polarity of at least one of the first-mentioned pick-ofisignals.

Conveniently, the second combining means includes a variable resistancewhich is variable to provide the said variable relationship.

Conveniently, the comparison means includes an electric motor which isarranged to control the variable resistance in response to the saiddifference between the outputs of the equalizer.

According to a second aspect of the invention there is provided anelectrical information transmission system of the type specified, thesystem having an equalizer according to the invention inserted betweenthe transmission link and the receiver, and the system being arrangedfor the transmission, from the transmitter to the receiver, of twosignals respectively of two different audio-frequencies, the comparisonmeans of the equalizer being arranged to respond to the differencebetween the outputs of the equalizer at those two frequencies.

An example of the invention will now be described with reference to theaccompanying drawings in which:

FIGS. 1 and 3 are block diagrams illustrating systems of the type towhich the invention is applicable;

FIG. 2 is a curve of attenuation plotted against frequency;

FIG. 4 is a part-schematic circuit diagram of one form of transversalnetwork;

FIG. 5 is a circuit diagram of a time-delay network for use in thenetwork of FIG. 4;

FIG. 6 is a part-schematic circuit diagram showing, in full lines, oneform of the transversal network of FIG. 4 and, in broken lines, a formof modification of the network;

FIG. 7 is a graph illustrating the frequency response of the modifiednetwork of FIG. 6;

FIG. 8 is a part-schematic circuit diagram of an automatic equalizercircuit according to the invention;

FIG. 9A and 9B in combination show a circuit diagram showing moredetails of the apparatus of FIG. 8, and

FIGS. I0, ll and I2 show eye patterns.

Referring to FIG. I, consider an electrical information transmissionsystem which includes a transmitter l of audio frequency signals and areceiver 2 of those signals, the receiver being located remotely fromthe transmitter, and the system being of the kind wherein the signalsare conveyed from the transmitter to the receiver by establishing aninterconnection therebetween by means of one at a time of typicallyavailable audio-frequency transmission links such as that indicated bythe broken line 3.

According to workers who examined and compared the audio-frequencyresponses of many such links, the median attenuation of those links hadthe form of the full-line curve of FIG. 2, and the attenuation of manyof those links rose approximately linearly (in decibels) within thefrequency bandwidth ofabout 1,200 Hz to 2,800 Hz.

The present invention proposes that this approximately linear rise inattenuation should be automatically approximately neutralized, forsystems of the type of FIG. I, by inserting, between the transmissionlink 3 and the receiver 2, a suitable automatic equalizing circuit 4(FIG. 3) which is designed to automatically balance the said linear risein attenuation by providing an appropriately rising amplitude response.

The equalizing circuit makes use of a transversal network of aparticular kind (of which an example is shown in FIG. 4). In the case ofFIG. 4, the transversal network comprises four identical delay networksI I, l2, l3 and 14 each having input terminals 15, 16 and outputterminals l7, 18, the networks 11- 14 being connected together inseries, output to input, to form a chain.

Each of the networks 1 1-14 of FIG. 4 has the same timedelay T, so thatif a wave represented by 2 is supplied to the input of one of thosenetworks, there emerges at the output of the network a correspondingwave represented bye i.e. each of the networks has a response factor eFIG. 5 shows one suitable form of delay network. The terminal 15 isconnected to the terminal 17 by way of three series-connectedinductances L I and L,, the inductances L, and L, being intercoupled andthe three inductances being bridged by a capacitance C,. The terminals16 and 18 are directly interconnected by a line which is connected, byway of a capacitance C,, to the common point of the inductances L, andI.,.

In FIG. 4, the input terminal 16 of the network 11, and the outputterminal 18 of the network 14, are connected to earth. The chain ofnetworks may thus be regarded as having an input (afforded by theterminal 15 of the network 11, which terminal is connected to the inputterminal 19 of the complete transversal network), an output (afforded bythe terminal 17 of the network 14), and three intermediate junctionseach formed where the output of one of the networks 1 1-13 is connectedto the input of the next succeeding network in the chain, the threeintermediate junctions being in this case afforded by the terminals 17of the respective networks 11-13.

The transversal network also includes a separate corresponding pick-offresistance associated with and connected to each of the said chaininput, the said chain output and the said intermediate junctions so asto provide, in response to an input signal appearing at the networkinput (terminal 19), a number of pick-off signals equal in number to thenumber of the resistances. In the case of FIG. 4, these resistances areconstituted respectively by the resistances 24, 28, and 25, 26, 27, theremote ends of the resistances being shown as commoned by connection tothe output tenninal 30 of the transversal network. In the simple case ofFIG. 4, the resistance 26 is of magnitude R the resistances 25 and 27are of identical magnitude R,, and the resistances 24 and 28 are ofidentical magnitude R,, the resistances R,,, R, and R, correspondingrespectively to conductances g,,, g, and 3,.

A suitable terminal impedance, in the form of a resistance R isconnected in known manner between the terminals I7 and 18 of the network14.

Thus, in FIG. 4, the output current wave (at the terminal 30, when 30 isconnected to a very low impedance,) for unit input wave (at the terminal19) is the sum of the five pick-off signals obtained respectively viathe five resistances 24-28, and is given by it being noted that thisresult is obtained by combining four of the five pick-off signals inpairs (e.g., ,2 and g,e' of which the two signals are of equal amplitude(3,) but differ in that one is delayed relatively to the other.

In calculating the response of the transversal network, the factor e"may be ignored, since it represents only a distortionless delay of 2T.Then the transversal network of FIG. 4 has the response Denoting (017')by 0, and noting that A, (an) is symmetrical about 0 1r, we choose 3,,g, and 3, such that A, (0)) has the values 0, 0, A and 1 respectivelyfor 0 equal to 0, 11/3, 21r/3 and 1r. This gives g,,= 'A, g, and g,1/12, whence A, (m) /S[ l3/2cosuBT+ cos 2:01 1, which approximatesclosely to a full, raised cosine curve and has the following values:

180" LOO The ratio of the resistances R, R, R, is given by the ratio Thetransversal network then has the basic form indicated in solid lines inFIG. 6, wherein R represents the magnitude of a basic resistance and 35represents an amplifier of current gain equal to (-l) of very low inputimpedance, and of high output inpedance.

If the response of the transversal network of FIG. 6 is denoted by A,(m), i.e. a particular example of A, (m), then we find that ifthattransversal network is so placed upon a unit pedestal that the overallresponse of the resulting arrangement is I h-A,'(m) where (h) is afraction of which the magnitude is adjustable as required, then thatoverall response is of the kind desired for the equalizing circuit 4 ofFIG. 3.

Thus, in FIG. 7, the curves X and Y show respectively the said overallresponse of such an arrangement, for the particular two cases of I hA,')4 db at a frequency of 2,850 Hz and (I hA,) 16 db at the same frequency.The curves X and Y are representative of a family of curves,corresponding to different values of the fraction (II), these curvesproviding good approximate compensations for the said approximatelylinear rise in attenuation of many audio-frequency transmission links.

It will be noted, from FIG. 7, wherein the straight-line curve d:represents the phase associated with the response l hA, that theintroduction of the arrangement into the system, in the manner of FIG.3, does not introduce a variation of timedelay over the audiofrequencyband.

The expression placed upon a unit pedestal" employed above, is intendedto indicate that the basic circuit of FIG. 6, as shown in the full linesand having the response A,', is so modified that the resultant responseis equal to the sum of unity and the fraction (II) of the response A,.

A general manner of attaining such a result is indicated by thebroken-line portion of FIG. 6, wherein the output at the output terminal30 of the basic transversal network is supplied to a potentiometer 43 ofwhich the tapping 44 is arranged to derive the required variablefraction (h) of that output and to supply that fraction to one input ofa summing amplifier 45 of which the other input is supplied, from thebasic transversal network, with a signal representing the unity justreferred to. In FIG. 6, this latter signal is shown as obtained, via aresistance 46, from that one said intermediate junction 40 which is atthe center of the chain: the reason for taking this further pick-oilsignal from the terminal 40 is to allow for the said distortionlessdelay of 2T associated with that factor e' which was ignored above, inderiving the expression for A, (w).

It is to be understood that the circuit of FIG. 6 is of simple form, inregard to the manner in which the said five pick-off signals and thesaid further pick-off signal are derived from the chain and subsequentlycombined as required.

FIG. 8 is a part-schematic circuit diagram of an automatic equalizingcircuit according to the invention and making use of the generalprinciples discussed above. The circuit gives a range of adjustment ofresponse from (at 2,850 Hz) 3.5 db to I7.5 db, relative to the responseup to about L200 Hz.

The circuit includes a modified transversal network of the general formof that described with reference to FIG. 6. Thus, the pick-offresistances 24, 26 and 28 provide three of the five pick-off signals inthe form of currents which are eflectively summed and inverted by afirst amplifying stage of the virtualearth-input type and having unitgain, the stage comprising a high-gain inverting amplifier 50 having afeed-back resistance 51 connected between its output and input andarranged to deliver its current output via resistance 52 to the input ofa second amplifying stage.

The pick-off resistances 25 and 27 similarly provide the remaining twopick-off signals in the form of currents which are also delivered to theinput of the second amplifying stage. The second amplifying stageeffectively sums and inverts the current signals thus delivered to itsinput, the stage comprising a high-gain amplifier 54 having a feedbackresistance 55 connected between its output and input and arranged todeliver its current output via a variable resistance 56 (correspondingto the potentiometer 43, FIG. 6) to the input of a third amplifyingstage.

The said further pick-off signal is obtained, in the form of a currentand via the further pick-off resistance 46, from that said intermediatejunction 40 which is at the center of the chain, the current signalbeing also delivered to the input of the third amplifying stage.

The third amplifying stage effectively sums the currents thus deliveredto its input, the stage comprising a high-gain amplifier 58 having afeedback resistance 59 connected between its output and input andarranged to deliver its output to the output terminal 62 of theequalizing circuit of which the input terminal is constituted by theterminal 19.

It will be noted that the magnitudes of the resistances 2448 departsomewhat from the ratios indicated in the simple circuit of FIG. 6. Thereason for this is that, whereas the above theory assumes that, for eachof the delay networks 11-14, the associated pick-off resistances can beso chosen as not to significantly affect the values of the load andsource impedances presented to those networks, in practice however,convenient values of those resistances do not always meet thiscondition. Thus, the theoretically derived simple arrangement may inpractice, in certain cases, have to be modified somewhat, in generallyknown manner and by simple experiment, in order to obtain the requiredresult. In the case of FIG. 8, the pick-off resistances 26 and 46 wouldsignificantly affect the delay-network impedance (of l Kilohm) in thiscase), were the effect not overcome by insertion of the resistances 63and 64. The attenuation changes associated with the introduction of theresistances 63, and 64 necessitated modification of the magnitudes ofthe pick-off resistances 26,46, 27 and 28.

When an equalizing circuit of the form of FIG. 8 is inserted into anelectrical information transmission system in the manner of FIG. 3, thetransmitter 1 of that system is arranged to transmit, over thetransmission link 3, two control signals respectively of two differentfrequencies of which at least one is within the frequency bandwidth overwhich the response (I 11A,) is arranged to be variable by adjustment ofthe fraction (It These control signals need not be continuouslytransmitted during the whole of the time for which the transmitter 1 isconnected to the receiver 2 by way of one particular transmission link 3but may conveniently be transmitted only for a limited time immediatelyfollowing the establishment of that connection by way of one particulartransmission link 3. Thus, for example, in the case where the system isthe data-transm' sion system of our co-pending U.S. Pat. applicationSer. No. 87,545 filed on Nov. 6, I970 the two control signals wouldconveniently be provided by, firstly, the continuously transmittedquadrature carrier of frequency 2,400 Hz, and, secondly, by causing thetransmitter to commence transmission to the receiver with a suflicientlylong series of binary ones, for such a series has a fundamental of 1,200Hz with no second harmonic.

The two control signals do not have to be of equal amplitude attransmission from the transmitter, but their relative amplitude must bepredetermined and (see below) the comparison circuit of the equalizerset accordingly.

Returning to P16. 8, assuming that those control signals arerespectively of frequency 1,200 112 and 2,400 Hz, the signals of thesefrequencies which appear at the terminal 62 are respectively selected bymeans of filters 67 and 68 of which the outputs are respectively bothrectified and smoothed by circuits 69 and 70. The resulting two signalsare supplied to the two inputs of a difference circuit 71 of which theoutput is amplified by the amplifier 72 of which the output is arrangedto drive an electric motor 73 arranged in known manner to control themagnitude of the resistance 56 by varying the position of the slider ofthat resistance. It will be understood that variation of the magnitudeof the resistance 56 eflectively varies the magnitude of the fraction(It) referred to above.

It is to be understood that, instead of the motor 73 controlling themagnitude of the resistance 56, any other suitable means may be employedto combine the said further pick-off signal with the said five pick-oftsignals in suitable variable relationship.

FIGS. 9A and 9B in combination show is a circuit diagram showing moredetails of the circuit of FIG. 8, corresponding elements having beenmarked with the same reference numerals. FIG. 98 can be combined withFIG. 9A by connecting the terminals designated A and B in the former tothose similarly designated in the latter. It will be noted that theoutput terminal 62 is capacitance-coupled via a capacitor 76 and aI-kilohm resistor 77 to a terminal 78 for connection to the receiver 2(FIG. 3). In a modification, a direct output of low impedance, with astanding direct voltage of about 8 volts, may be employed instead. Theterminal 62 is also connected, via a transistor amplifier stage 79, tothe filters 67 and 68. The current outputs of the rectifying andsmoothing circuits 69 and 70 are differenced in the amplifying stage 71,the variable resistance permitting the ratio of the two currents to beadjusted to suit the predetermined relative amplitudes of the twocontrol signals at transmission from the transmitter. The onoff switch81 can be used to disconnect the output of the amplifier 72 from themotor 73, thereby interrupting the automatic operation of the circuit.The input impedance of the arrangement, at the terminal 19, is l kilohm,and attention must be paid to impedance matching at this point. Themaximum output of the arrangement is 5 volts peak-to-peak, when theinput at 600 Hz is 5 volts peak-to-peak.

Referring to FlG. 9A in detail, the transversal network at the topleft-hand corner is identical with that of FIG. 8. The input to theamplifier 50 (FIGS. 8, 9) appears at the terminal which is connected tothe base of a transistor 101 of which the emitter is connected to earthand the collector is connected, firstly, via the resistance 51 to thebase, and, secondly, via a resistance 102 to a positive supply line 103.The terminal 100 is also connected via a resistance 104 to a commonpoint 105 which is connected, firstly, via a resistance 106 to anegative supply line 107, and, secondly, via a capacitance 108 to earth.

The collector of transistor 101 is also connected via the resistance 52to a common point 111 which constitutes the input of the amplifier 54(FIGS. 8, 9). The common point 111 is connected, firstly, via aresistance 112 to the common point 105, and, secondly, to the base of atransistor 1 13 of which the emitter is connected to earth and thecollector is connected, firstly, via a resistance 114 to the line 103,and, secondly, to the base of a transistor 115. The collector of thistransistor is connected to the supply line 103, and the emitter isconnected, firstly, via the resistance 55 to the common point 111, and,secondly, via a resistance 116 to earth, and, thirdly, via a capacitance1 17 to the terminal 30.

The terminal 30 is connected, via the variable resistance 56 and asupplementary resistance 1 18, to the common point 1 19 whichconstitutes the input of the amplifier 58 (FIGS. 8,9). THe common point119 is connected, firstly, via a resistance 120 to the common point 105,and, secondly, to the base of a transistor 121 of which the emitter isconnected to earth and the collector is connected, firstly, via aresistance 122 to the supply line 103, and, secondly, to the base of atransistor 123 of which the collector is also connected to the line 103.

The emitter of the transistor 123 is connected, to the terminal 62 whichis connected, firstly, via the resistance 59 to the common point 119,and, secondly, via a resistance 124 to earth, and, thirdly, via thecapacitance 76 and the series resistance 77 to the terminal 78, and,fourthly, to the base of a transistor 129 of the amplifying stage 79.

The collector of the transistor 129 is connected to the supply line 103,and the emitter is connected via a resistance 130 to the negative supplyline 107.

The emitter is also connected, via a resistance 131, (P16. 98) to thetapping (at 7 turns from one end) of an inductance 132 (having 57'turns) bridged by a capacitance 133, the said one end of the inductancebeing earthed.

The emitter is also connected, via a resistance 131', to the tapping (atT turns from one end) of an inductance 132' (having STturns) bridged bya capacitance 133', the said one end of the inductance 132' being alsoearthed.

The tapping of the inductance 132 is connected to the base of atransistor 134 of which the collector is connected, via a resistance135, to a negative supply line 136 and of which the emitter isconnected, firstly, via a resistance 137 to a positive supply line 138,and, secondly, to the cathode of a diode rectifier 238 of which theanode is connected, firstly, via a capacitance 139 to earth, and,secondly, via the variable resistance 80 and a fixed series resistance140, to the input of a high-gain inverting amplifier 141 havingafeedback resistance 142 connected between its output and its input.

The tapping of the inductance 132 is connected to the base of atransistor 134 of which the collector is connected, via a resistanceI37, to the supply line I38 and of which the emitter is connected,firstly, via a resistance 135' to the negative supply line I36, and,secondly, to the anode of a diode rectifier 238' of which the cathode isconnected, firstly, via a capacitance 139' to earth, and, secondly, viaa resistance 140' to the input ofthe amplifier I41 (FIG. 9B).

The output of the amplifier 141 (FIG. 9A) is connected to the base ofatransistor 148 of which the collector is connected to the negativesupply line I36 and the emitter is connected, via a resistance 149, tothe base of a transistor 150 of which the collector is connected to theline 136.

The base of the transistor 150 is connected to the cathode of a dioderectifier 151 of which the anode is connected to the cathode of afurther diode rectifier I52 of which the anode is connected, firstly,via a resistance 153 to the positive supply line 138, and, secondly, tothe base of a transistor 154 of which the collector is connected to theline 138.

The emitter of transistor I50 is connected, via a resistance 155, to onecontact of the on-off switch 81, which contact is also connected, via aresistance I56, to the emitter of transistor 154. The other contact ofthe switch 81 is connected, via the motor 73, to earth.

The broken line of FIG. 2 illustrates how the equalizer is employed tobalance the said approximately linear rise in attenuation of atransmission link 3 (FlG. 3) by providing an appropriately risingresponse.

The remaining FlGS. -12 show the response characteristics of thetransmission systems in the form of the amplitude response and delaycharacteristics in terms of decibels and milliseconds as a function ofthe frequency variation of the signal in the usual form of eye patterns.FIG. 10 shows the eye pattern of a bipolar system in which there is noline distortion. FIG. II shows a severely degraded eye pattern in whichthere are median attenuation and time-delay distortions as found incertain transmission links. FIG. 12 shows an improved eye pattemobtained with the present equalizer in com junction with the atransmission line which had median attenuation and time-delaydistortions.

What we claim is:

I. An automatic equalizer to be inserted in a transmission systembetween its transmission link and receiver for correcting the frequencydependent distortions in the signal introduced by said transmissionlink, said equalizer including a transversal network comprising:

at least two time-delay circuits each having an input and an output andconnected together in series so as to form a chain having an input andan output, which constitutes the transversal network input and output,and at least one intermediate junction formed where the output of one ofsaid time-delay circuit is connected to the input of the next succeedingtime-delay circuit in the chain, the network also including,

a separate corresponding pick-ofl means associated with and connected toeach of the input and output of said transversal network and theintermediate junction so as to provide, in respome to the input signalappearing at the network input, a number of pick-on signals equal innumber to the number of the pick-off means, and the network alsoincluding,

first combining means for combining the pick-off signals inpredetermined relationship to produce a first network output signal, thenetwork also including, at least one further pick-01f means associatedwith and connected to said at least one intermediate junction so as toprovide, in response to the input signal appearing at the network input,a further pick-0B signal constituting a second network output signal,and the network also including,

second combining means for combining the first and the second networkoutput signals in variable relationship to thereby correct thefrequency-dependent distortions.

The equalizer according to claim I, wherein there is an even number ofthe time-delay circuits arranged in pairs, the circuits of each pairhaving equal time-delays and being symmet rically locatui at oppositesides of that one said intermediate junction which is at the center ofthe chain, the first-mentioned pick-ofl" means being so selected thatthe corresponding pick-0E signals comprise a single pick-off signal fromthe said central one intermediate junction and a number of pairs ofpick-oft signals for each of which pairs the two signals are similarexcept that one is time-delayed relative to the other.

3. The equalizer according to claim 2, wherein said further pick-ofi'means, is associated with and connected to the said one intermediatejunction which is at the center of the chain.

4. The equalizer according to claim 3, wherein there are four of thetimedelay circuits.

5. The equalizer according to claim 4, wherein the timedelay circuitshave each the same time-delay.

6. The equalizer according to claim 5, wherein the first combining meanscomprises, at least in part, the connection of at least two of thefirst-mentioned pick-off signals to a com mon point.

7. The equalizer according to claim 6, wherein the first combirtingmeans comprises, at least in part, an inverting amplifier connected tosaid common point for reversing the polarity of at least one of thefirst-mentioned pick-oft signals.

8. The equalizer according to claim 7 wherein the second combining meansincludes a variable resistance which is variable to provide the saidvariable relationship.

9. The equalizer according to claim 8 having an amplitudefrequencyresponse in the form of a family of curves and including comparisonmeans for comparing the outputs of said transversal delay network at twodifferent frequencies of which at least one is within a preselectedaudio frequency bandwidth to select a predetermined one of the saidfamily of CHI'VQS.

10. The equalizer according to claim 9 wherein said comparison meansincludes an electric motor which is arranged to control said variableresistance in response to the said difference between the two outputs ofsaid transversal delay network.

i l i II l

1. An automatic equalizer to be inserted in a transmission systembetween its transmission link and receiver for correcting thefrequency-dependent distortions in the signal introduced by saidtransmission link, said equalizer including a transversal networkcomprising: at least two time-delay circuits each having an input and anoutput and connected together in series so as to form a chain having aninput and an output, which constitutes the transversal network input andoutput, and at least one intermediate junction formed where the outputof one of said time-delay circuit is connected to the input of the nextsucceeding time-delay circuit in the chain, the network also including,a separate corresponding pick-off means associated with and connected toeach of the input and output of said transversal network and theintermediate junction so as to provide, in response to the input signalappearing at the network input, a number of pick-off signals equal innumber to the number of the pick-off means, and the network alsoincluding, first combining means for combining the pick-off signals inpredetermined relationship to produce a first network output signal, thenetwork also including, at least one further pick-off means associatedwith and connected to said at least one intermediate junction so as toprovide, in response to the input signal appearing at the network input,a further pick-off signal constituting a second network output signal,and the network also including, second combining means for combining thefirst and the second network output signals in variable relationship tothereby correct the frequency-dependent distortions. cThe equalizeraccording to claim 1, wherein there is an even number of the time-delaycircuits arranged in pairs, the circuits of each pair having equaltime-delays and being symmetrically located at opposite sides of thatone said intermediate junction which is at the center of the chain, thefirst-mentioned pick-off means being so selected that the correspondingpick-off signals comprise a single pick-off signal from the said centralone intermediate junction and a number of pairs of pick-off signals foreach of which pairs the two signals are similar except that one istime-delayed relative to the other.
 3. The equalizer according to claim2, wherein said further pick-off means, is associated with and connectedto the said one intermediate junction which is at the center of thechain.
 4. The equalizer according to claim 3, wherein there are four ofthe time-delay circuits.
 5. The equalizer according to claim 4, whereinthe time-delay circuits have each the same time-delay.
 6. The equalizeraccording to claim 5, wherein the first combining means comprises, atleast in part, the connection of at least two of the first-mentionedpick-off signals to a common point.
 7. The equalizer according to claim6, wherein the first combining means comprises, at least in part, aninverting amplifier connected to said common point for reversing thepolarity of at least one of the first-mentioned pick-off signals.
 8. Theequalizer according to claim 7 wherein the second combining meansincludes a variable resistance which is variable to provide the saidvariable relationship.
 9. The equalizer according to claim 8 having anamplitude-frequency response in the form of a family of curves andincluding comparison means for comparing the outputs of said transversaldelay network at two different frequencies of which at least one iswithin a preselected audio frequency bandwidth to select a predeterminedone of the said family of curves.
 10. The equalizer according to claim 9wherein said comparison means includes an electric motor which isarranged to control said variable resistance in response to the saiddifference between the two outputs of said transversal delay network.